In general, in the descriptions that follow, the first occurrence of each special term of art that should be familiar to those skilled in the art of integrated circuits (“ICs”) and systems will be italicized. In addition, when a term that may be new or that may be used in a context that may be new, that term will be set forth in bold and at least one appropriate definition for that term will be provided. In addition, throughout this description, the terms assert and negate may be used when referring to the rendering of a signal, signal flag, status bit, or similar apparatus into its logically true or logically false state, respectively, and the term toggle to indicate the logical inversion of a signal from one logical state to the other. Alternatively, the mutually exclusive boolean states may be referred to as logic_0 and logic_1. Of course, as is well known, consistent system operation can be obtained by reversing the logic sense of all such signals, such that signals described herein as logically true become logically false and vice versa. Furthermore, it is of no relevance in such systems which specific voltage levels are selected to represent each of the logic states.
Hereinafter, reference to a facility shall mean a circuit or an associated set of circuits adapted to perform a particular function regardless of the physical layout of an embodiment thereof. Thus, the electronic elements comprising a given facility may be instantiated in the form of a hard macro adapted to be placed as a physically contiguous module, or in the form of a soft macro the elements of which may be distributed in any appropriate way that meets speed path requirements. In general, electronic systems comprise many different types of facilities, each adapted to perform specific functions in accordance with the intended capabilities of each system. Depending on the intended system application, the several facilities comprising the hardware platform may be integrated onto a single IC, or distributed across multiple ICs. Depending on cost and other known considerations, the electronic components, including the facility-instantiating IC(s), may be embodied in one or more single- or multi-chip packages. However, unless expressly stated to the contrary, the form of instantiation of any facility shall be considered as being purely a matter of design choice.
Shown in FIG. 1 is a typical general purpose computer system 100. Although not all of the electronic components illustrated in FIG. 1 may be operable in the sub-threshold or near-threshold domains in any particular embodiment, some, at least, may be advantageously adapted to do so, with concomitant reductions in system power dissipation. In particular, in recently-developed battery powered mobile systems, such as smart-phones and the like, many of the discrete components typical of desktop or laptop devices illustrated in FIG. 1 are integrated into a single integrated circuit chip. Shown by way of example in FIG. 2 is a typical single-chip microcontroller unit (“MCU”) 200 comprising: a central processing unit (“CPU”), at least one static random-access memory (“SRAM”) facility 210,220, and a power supply 230.
SRAM circuits capable of storing digital information are widely used in a variety of mobile and handheld devices, e.g., smart phones, tablets, laptops, and other consumer electronics products. SRAM facilities may include, without limitation, stand-alone memory circuits, with a dedicated substrate, or embedded memory circuits, where the SRAM circuit shares a substrate with other electronic components.
Unlike flash or phase change memories, data storage in SRAM circuits requires continuous power. Typically, SRAM circuits are powered by a single power supply, e.g., a power source having only one power domain. Such a supply will power all SRAM sub-circuits, including, without limitation decoders, sense amplifiers (sense amps), write driver, and control logic. Additionally, one of ordinary skill in this art will appreciate that this supply can be used to create local, temporary voltages with a value different from the power supply.
A typical SRAM circuit performs two functions, a write operation and a read operation. During a write operation, an address and a data is asserted on the inputs of the SRAM, and the asserted data is written into the SRAM location provided by the asserted address. The state of the data written into the location specified by the address will remain static as long as the SRAM facility is powered appropriately, and so long as the location specified by given address is not rewritten with another data.
During a read operation, an address is asserted on the inputs of the SRAM facility and the data at the location specified by the asserted address will be asserted on the outputs of the SRAM circuit by the SRAM facility's internal circuitry. Internally to the SRAM facility, decoders will decode the address and select the appropriate array lines that will uniquely access a specific SRAM cell or cells. During a write operation, a write driver circuit will apply the input data to the line or lines selected by the decoders. During a read operation, a sense amplifier will read the data from the SRAM cell and subsequent circuitry will place the resulting logic data on the output of the SRAM circuit. Multiple data bits can be read simultaneously when multiple SRAM cells are selected and multiple sense amplifiers activated.
Switching all the necessary nodes to carry the address and data information within the SRAM circuit results in a significant power consumption. What is needed is an apparatus and method adapted to provide address and data selection within the SRAM while consuming less power than known prior art.